Regviz

NXP Semiconductors /LPC43xx /TIMER0 /CR0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR0

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC18xx/TIMER0/CR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CAP

Description

Capture Register 0. CR0 is loaded with the value of TC when there is an event on the CAPn.0 input.

Fields

CAP

Timer counter capture value.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data